Device
A device for generating a signal of a multi-layer compressed video signal, an intermediate layer synchronized, in the system's encoding end including a time flag baseline The device is refreshed by the crossing time of each circuit. In the system's receiving end, a counter responds to the count value of the counter in response to the controlled receiver clock signal. Recover the time flag and difference time flag from the signal, and combine the time flag to form the correction. The difference between the receiver counter continuous sampling count value is compared to the difference of the time flag corresponding to the continuous correction to provide a signal to control the receiver clock signal.
Features
1. A device for synchronizing at least a portion of the compressed video signal receiving system, which processes a compressed signal that occurs in the transmitted data packet of the compressed video signal, wherein each recognizable packet of the transmitted data packet. Including a program clock reference clock reference cycle to the count value obtained from the counter used to the burst K (K positive integer) of the encoding system clock, and it includes a difference associated with a program clock reference with the data of the pre-compressed signal. The value of the value, the pre-compressed signal and the compressed video signal and the incremental delay multiplexing caused by the transfer packet, the apparatus, including the count value and the difference count value The source of the transmission packet of the transfer packet; the controlled oscillator (37) provides a receiver system clock in response to the control signal E; a receiver counter for the receiver system clock pulse die K (36); Devices (31, 35), in response to the occurrence of transmission packets including the count value, used to store count values output from the receiver counter; for recovery from the transmission packet And the difference count value, and in response to a continuous stored count value corresponding to the receiver counter output and the count value and the difference count value of the transmission packet, (38, 39) The device (32) controlling the control signal E of the controlled oscillator.
