Меко језгро

Увод

Notlongago,AlteraofficiallylaunchedtheNiosIIseriesof32-bitRISCembeddedprocessors.TheNiosIIseriesofsoft-coreprocessorsareAltera'ssecond-generationFPGAembeddedprocessors.Itsperformanceexceeds200DMIPS,anditonlycosts35centstoimplementinAlteraFPGAs.Altera'sStratix,StratixGX,StratixII,andCycloneseriesFPGAsfullysupportNiosIIprocessors,andfutureFPGAdeviceswillalsosupportNiosII.

SinceAlteralaunchedthefirst16-bitNiosprocessorin2000,ithasdeliveredmorethan13,000Niosdevelopmentkits,andNioshasbecomethemostpopularsoft-coreprocessor.ThenewlylaunchedNiosIIseriesadoptsabrand-newarchitectureandhasahigherlevelofefficiencyandperformancethanthefirst-generationNios.Comparedwiththefirstgeneration,theNiosIIcoreoccupieslessthan50%ofFPGAresourcesonaverage,andthecomputingperformancehasdoubled.

НиосИИ серија укључује 3 производа, и то: НиосИИ/ф (брзи) - највеће перформансе система, средња употреба ФПГА; НиосИИ/с (стандардна) - високе перформансе, ниска употреба ФПГА; НиосИИ/е (економска) - ниске перформансе, најнижа употреба ФПГА. -битни регистри опште намене и 32 екстерна извора прекида; користећи исту архитектуру сетовања инструкција (ИСА), 100% компатибилан са бинарним кодом, дизајнери могу да промене ЦПУ у складу са променама у системским захтевима и изаберу најбоље решење које задовољава перформансе и цену без утицаја на инвестицију.

Inparticular,theNiosIIseriessupportstheuseofdedicatedcommands.Thededicatedinstructionisahardwaremoduleaddedbytheuser,whichaddsanarithmeticlogicunit(ALU).Userscancreateupto256dedicatedinstructionsforeachNiosIIprocessorusedinthesystem,whichallowsdesignerstofine-tunethesystemhardwaretomeetperformancegoals.ThededicatedinstructionlogicisthesameastheNiosIIinstructionitself.Itcanfetchvalues​​fromuptotwosourceregistersandoptionallywritetheresultbacktothetargetregister.Atthesametime,theNiosIIseriessupportsmorethan60peripheraloptions.Developerscanchoosetherightperipheralsandgetthemostsuitablecombinationofprocessors,peripheralsandinterfaceswithouthavingtopayforsiliconfunctionsthatarenotusedatall.

TheNiosIIseriescanmeettheneedsofanyapplicationof32-bitembeddedmicroprocessors.Customerscantransplantthefirst-generationNiosprocessordesigntoacertainNiosIIprocessor.AlterawillsupportexistingFPGAsforalongtime.Thefirst-generationNiosprocessorintheseries.Inaddition,Alteraprovidesaone-clickmigrationoptionthatcanbeupgradedtotheNiosIIseries.NiosIIprocessorscanalsobeimplementedinHardCopydevices,andAlteraalsoprovidesASICtransplantationforsystemsbasedonNiosIIprocessors.

TheNiosIIprocessorhasacompletesoftwaredevelopmentkit,includingacompiler,integrateddevelopmentenvironment(IDE),JTAGdebugger,real-timeoperatingsystem(RTOS)andTCP/IPprotocolstack.ThedesignercanusetheSOPCBuildersystemdevelopmenttoolintheAlteraQuartusIIdevelopmentsoftwaretoeasilycreateadedicatedprocessorsystem,andcanaddthenumberofNiosIIprocessorcoresaccordingtotheneedsofthesystem.

TheNiosIIsoftwaredevelopmenttoolcanbeusedtobuildsoftwarefortheNiosIIsystem,thatis,one-clickautomaticgenerationofadedicatedC/C++operatingenvironmentsuitableforsystemhardware.NiosIIintegrateddevelopmentenvironment(IDE)providesmanysoftwaretemplatestosimplifyprojectsettings.Inaddition,theNiosIIdevelopmentkitincludestwothird-partyreal-timeoperatingsystems(RTOS)-MicroC/OS-II(Micrium),NucleusPlus(ATI/Mentor)andTCP/IPprotocolstackfornetworkapplications.

Foralongtime,thereasonwhyAlterahasbeenpursuingtheembeddedprocessorstrategyisthatastheapplicationofASICdevelopmentisincreasinglytroubledbycosts,OEMsareincreasinglyturningtoFPGAstobuildtheirownsystems.Mostofthesesystemsrequireaprocessor,andAlteraprovidesdesignerswithflexibleembeddedprocessorsolutionsoptimizedforFPGAsthatcanmeettheneedsofthe16-bitand32-bitembeddedprocessormarket.Itisestimatedthatby2007,themarketvaluewillreach11billionUSdollars.

Theadvantageofusingsoft-coreprocessorsinFPGAsoverhard-coresisthathard-coreimplementationshavenoflexibilityandusuallycannotusethelatesttechnology.Asthesystembecomesmoreadvanced,solutionsbasedonstandardprocessorswillbeeliminated,whilesolutionsbasedonNiosIIprocessorsareconstructedbasedonHDLsourcecode,whichcanbemodifiedtomeetnewsystemrequirementsandavoidthefateofbeingeliminated.ByimplementingtheprocessorasanHDLIPcore,developerscanfullycustomizetheCPUandperipheralstoobtainaprocessorthatjustmeetstheneeds.

Карактеристике

TheNios®IIseriesofembeddedprocessorsarespeciallyoptimizedfortheintegratedapplicationsofAltera®FPGAsandProgrammableSystem-on-Chip(SOPC).Table1detailsthecharacteristicsoftheNiosIIsoft-coreembeddedprocessorseries.Formoregeneralinformation,pleaserefertotheNiosIIintroductionpage.

Табле1.НиосИИембеддедпроцессорссериесфеатурес

Феатуредесцриптион

Десигнпроцессандтоолс

DetailsofhardwaredevelopmenttoolsonthispageListedthedevelopmenttoolsusedtobuildtheNiosIIprocessorhardwaresystem.

SoftwaredevelopmenttoolsThispageprovidesinformationabouttheNiosIIintegrateddevelopmentenvironment(IDE),whichisanintegrateddevelopmentenvironmentwidelyusedbydevelopers,includingediting,compiling,anddebuggingapplicationsoftware..

DevelopmentkitAlteraanditspartnersprovidealargenumberofdevelopmentboardkitsthatusetheNiosIIseriesofembeddedprocessors.

System-leveldesignflowAltera’sSOPCBuildertoolprovidestheabilitytoquicklybuildSOPCsystems.ThisarchitecturecanincludeoneorseveralCPUs,providememoryinterfaces,peripheraldevices,andsysteminterconnectionlogic.system.

Арцхитецтуреандфеатурес

NiosIIprocessorcoreNiosIIprocessorseriesconsistsofthreedifferentcores,whichcanflexiblycontrolcostandperformance,thushavingawiderangeofapplications.

JTAGdebuggingmoduleTheJTAGdebuggingmoduleprovidestheon-chipcontrol,debuggingandcommunicationfunctionsoftheNiosIIprocessorthrougharemotePChost.ThisisaverycompetitivefeatureoftheNiosIIprocessor.

UserinstructionsDeveloperscanaddhardwaretotheNiosIICPUcoretoperformcomplexcomputingtasksandprovideaccelerationalgorithmsforsoftwarewithtighttimingrequirements.

PeripheralsandinterfacesTheNiosIIdevelopmentkitincludesasetofstandardperipheralequipmentlibraries,whichcanbeusedfreeofchargeinAltera'sFPGA.

Avalon™SwitchedBusTheAvalonSwitchedBusimplementsnetworkconnectionsbetweenprocessors,peripherals,andinterfacecircuits,andprovideshigh-bandwidthdatapaths,multiplechannels,andreal-timeprocessingcapabilities.AvalonswitchingbuscanbeautomaticallygeneratedbycallingSOPCBuilderdesignsoftware.

Десигнресоурцес

NiosIIprocessorsupportNiosIIprocessorsupportpageprovidesavarietyofinformationhelpfultoNiosIIdesigners,includinglicenses,downloads,andreferencedesigns,Documentation,onlinedisplayandcommonproblems.

EmbeddedProcessorSolutionCenterTheEmbeddedProcessorSolutionCenterprovidesalotofinformationtohelpdevelopersimplementsystemdesignsusingAltera'sembeddedprocessors.Theavailableinformationincludesdevicesupport,softwaredevelopmenttools,peripheralequipmentandinterfaces,training,technicalsupportandmaterials.

NiosrenewalinformationTheNiosIIdevelopmentkitincludesaone-yearupgradelicensefortheCPU,peripherals,andembeddedsoftwaredevelopmenttools.(ThisdoesnotincludeQuartus®IIsoftwareupgrades.)CustomerscanorderadditionalinformationincludingNiosIIprocessorupgradeseachyearthroughtheNiosrenewalprogram.

NiosIIEmbeddedProcessorQuestionsandAnswersPageThispageprovidesfrequentlyaskedquestionsandanswersaboutAlteraNiosIIseriesembeddedprocessors.

TheexcellentcharacteristicsofStratix®IIdevicesandNiosIIprocessorseriesStratixIIdevicestructurecombinedwithNiosIIembeddedprocessorseriesprovideunparalleledprocessingcapabilitiestomeettheneedsofnetwork,communication,datasignalprocessing(DSP)application,massstorageandotherhighbandwidthsystemapplicationrequirements.

ThecombinationoftheexcellentfeaturesofStratixdevicesandNiosIIprocessorseriesStratixFPGAstructureandNiosIIembeddedprocessorprovideshighprocessingpowertomeettheneedsofhigh-bandwidthsystemapplications.

Cyclone™devicesandNiosIIprocessorseriesuseNiosIIembeddedprocessorseriesinCyclonedevices,reducingcosts,increasingflexibility,andprovidinglow-costdiscretemicroprocessorsinprice-sensitiveapplicationenvironmentsThedeviceprovidesanidealsubstitute.

Related Articles
TOP