linja-auto

Kuinka se toimii

IftheMotherBoardisacity,thenthebusislikeabusinthecity,whichcanbetransmittedbackandforthaccordingtoafixedroute.Operatingbit(bit).Alinecanonlyberesponsiblefortransmittingonebitatthesametime.Therefore,multiplelinesmustbeusedatthesametimetotransmitmoredata,andthenumberofdatathatthebuscantransmitatthesametimeiscalledwidth,inbits,thelargerthebuswidth,thebetterthetransmissionperformance.Thebusbandwidth(thatis,thetotalnumberofdatathatcanbetransmittedperunittime)is:busbandwidth=frequencyxwidth(Bytes/sec).Whenthebusisidle(otherdevicesareconnectedtothebusinahigh-impedancestate)andadevicewantstocommunicatewiththetargetdevice,thedevicethatinitiatesthecommunicationdrivesthebusandsendsoutaddressesanddata.Ifotherdevicesconnectedtothebusinahigh-impedancestatereceive(orcanreceive)theaddressinformationthatmatchestheirown,theywillreceivethedataonthebus.Thesendingdevicecompletesthecommunicationandgivesupthebus(theoutputbecomesahighimpedancestate).

Apubliclineorchannelusedinacomputertoconnectvariousfunctionalcomponentsandtransmitdatabetweenthem.Accordingtotheconnectedobjectsinthecomputersystem,thebuscanbedividedinto:Chipbus,alsoknownasthedevice-levelbus,whichisthebusinsidethecentralprocessingunitchip.Sisäinen väylä,alsoknownassystembusorboard-levelbus,isthetransmissionpathbetweenthefunctionalunitsofthecomputer.Microcomputerbusisusuallycalledinternalbus.Ulkoinen väylä,alsoknownascommunicationbus,isatransmissionpathbetweencomputersystemsorbetweenacomputerhostandperipheraldevices.

Thebusisashareddatatransmissiondevice.Althoughmultipledevicescanbeconnectedtothebus,usuallyonlyonepairofdevicescanparticipateindatatransmissionatanyonetime.Accordingtotheformofinformationtransmission,thebuscanbedividedintotwotypes:parallelbusandserialbus.Parallelbususesntransmissionlinestotransmitn-bitbinaryinformationatthesametime.Itischaracterizedbyfasttransmissionspeed,butthesystemstructureismorecomplicated.Itisusedfortheconnectionbetweenvariouscomponentsinthecomputersystem;serialbussharesmulti-bitbinaryinformationOnatransmissionline,multiplebitsofbinaryinformationpassthroughthebusinchronologicalorder.Itischaracterizedbyasimplestructure,butitstransmissionspeedisrelativelyslow.Thebusmusthaveaclearspecification:Bustiming-protokolla,thatis,certaintimingrulesmustbeobservedwhentransmittinginformationonthebus,suchassynchronousbustiming,asynchronousbustiming,semi-synchronousbustiming,etc.Thephysicalcharacteristicsofthebus,includingtheelectricalcharacteristicsofsignals,powersupplies,andaddresses,aswellasthemechanicalcharacteristicsofconnectionsandconnectors.Busbandwidth,itisthehighesttransferratethatthebuscanreach,anditsunitisMB/S.

Bussiominaisuudet

Becausethebusisasetofsignallinesconnectingvariouscomponents.Theinformationisrepresentedbythesignalonthesignalline,andtheoperationcanbeagreeduponbyagreeingonthesequenceofdifferentsignals.Thecharacteristicsofthebusareasfollows

• (1)Physicalcharacteristics:Physicalcharacteristicsarealsoknownasmechanicalcharacteristics,whichrefertosomecharacteristicsshownbythecomponentsonthebuswhentheyarephysicallyconnected,suchasplugsandsockets.Geometry,shape,numberofpinsandarrangementorder,etc.

• (2)Functionalcharacteristics:Functionalcharacteristicsrefertothefunctionofeachsignalline,suchastheaddressbususedtorepresenttheaddresscode.Thedatabusisusedtorepresentthetransmitteddata,andthecontrolbusrepresentsthecommandsandstatusofoperationsonthebus.

• (3)Electricalcharacteristics:Electricalcharacteristicsrefertothesignaldirectionofeachsignallineandtheeffectivelevelrangeofthesignal.Usually,themainequipment(suchasCPU)Thesignalsentoutiscalledtheoutputsignal(OUT),andthesignalsenttothemaindeviceiscalledtheinputsignal(IN).Generally,datasignalsandaddresssignalsdefinehighlevelaslogic1andlowlevelaslogic0.Thereisnoconventionalconventionforcontrolsignals.Forexample,WEmeanslowlevelisvalid,andReadymeanshighlevelisvalid.Thereisnouniformregulationforthehighandlowlevelrangesofdifferentbuses,andtheyareusuallyconsistentwithTTL.

• (4)Timecharacteristics:Timecharacteristicsarealsocalledlogiccharacteristics,whichrefertowhenthesignaloneachsignallineisvalidduringthebusoperation,anditisvalidthroughthissignalThetimingrelationshipagreementensuresthecorrectoperationofthebus.Inordertoimprovethescalabilityofthecomputerandtheversatilityofcomponentsandequipment,inadditiontotheon-chipbus,eachcomponentordeviceisconnectedtothebusinastandardizedform,andinformationtransmissiononthebusisrealizedinastandardizedway.Thesestandardizedconnectionformsandoperationmodesofthebusarecollectivelyreferredtoasbusstandards.SuchasISA,PCI,USBbusstandards,etc.Correspondingly,thebusesusingthesestandardsareISAbus,PCIbus,USBbus,etc.

Bussiluokitus

Buscanbedividedintofivemajortypesaccordingtofunctionsandspecifications:

• DataBus:TransferdatathatneedstobeprocessedorneedstobestoredbackandforthbetweenCPUandRAM.

• AddressBus:UsedtospecifytheaddressofthedatastoredinRAM(RandomAccessMemory).

• ControlBus:Transmitthesignalofthemicroprocessorcontrolunit(ControlUnit)toperipheralequipment.

• ExpansionBus:Thebusfordatacommunicationbetweenexternaldevicesandthecomputerhost,suchasISAbusandPCIbus.

• Paikallisbussi:Anexpansionbusthatreplaceshigher-speeddatatransmission.

DatabusDB(DataBus), osoiteväyläAB(Osoiteväylä)ja ControlbusCB(ControlBus) ovat myös yhteisesti viitattu järjestelmäväylään, mikä yleensä tarkoittaa yllämainittua väylää.

Insomesystems,thedatabusandtheaddressbusaremultiplexed,thatis,thesignalthatappearsonthebusatcertainmomentsrepresentsdataandothermomentsrepresentaddresses;andsomesystemsareseparate.Theaddressbusanddatabusofthe51seriessingle-chipmicrocomputeraremultiplexed,whilethebusinthegeneralPCisseparate.

"DataBusDB"isusedtotransmitdatainformation.Thedatabusisatwo-waythree-statebus,thatis,itcantransmitdatafromtheCPUtoothercomponentssuchasamemoryorI/Ointerface,andcanalsotransmitdatafromothercomponentstotheCPU.Thenumberofbitsofthedatabusisanimportantindicatorofthemicrocomputer,anditisusuallyconsistentwiththewordlengthofthemicro-processing.Forexample,thewordlengthoftheIntel8086microprocessoris16bits,anditsdatabuswidthisalso16bits.Itshouldbepointedoutthatthemeaningofdataisbroad.Itcanberealdata,instructioncodeorstatusinformation,andsometimesevencontrolinformation.Therefore,inactualwork,whatistransmittedonthedatabusisnotnecessarilyIt'sjustdatainthetruesense.

Commondatabeja ovat ISA (ISAbus), EISA, VESA, PCI jne.

"AddressbusAB"isspeciallyusedtotransmitaddresses.SincetheaddresscanonlybetransmittedfromtheCPUtotheexternalmemoryorI/Oport,theaddressbusisalwaysone-waythree-state,whichisdifferentfromthedataThebusisdifferent.ThenumberofbitsoftheaddressbusdeterminesthesizeofthememoryspacethatcanbedirectlyaddressedbytheCPU.Forexample,iftheaddressbusofan8-bitmicrocomputeris16bits,themaximumaddressablespaceis2^16=64KB,andthe16-bitmicrocomputer(x-bitprocessingThedevicereferstothenumberofbits(1,0)thatthemicroprocessorcanhandleinoneclockcycle,thatis,thewordlength).Theaddressbusis20bits,anditsaddressablespaceis2^20=1MB.Generallyspeaking,iftheaddressbushasnbits,theaddressablespaceis2^nbytes.

"ControlbusCB"isusedtotransmitcontrolsignalsandtimingsignals.SomeofthecontrolsignalsaresentbythemicroprocessortothememoryandI/Ointerfacecircuits,suchasread/writesignals,chipselectsignals,interruptresponsesignals,etc.;therearealsoothercomponentsthatarefedbacktotheCPU,suchasinterruptrequestsignals,resetSignals,busrequestsignals,equipmentreadysignals,etc.Therefore,thetransmissiondirectionofthecontrolbusisdeterminedbythespecificcontrolsignal,(information)isgenerallybidirectional,andthenumberofbitsofthecontrolbusshouldbedeterminedaccordingtotheactualcontrolneedsofthesystem.Infact,thespecificsituationofthecontrolbusmainlydependsontheCPU.

Accordingtothewayoftransmittingdata,itcanbedividedintoserialbusandparallelbus.Intheserialbus,thebinarydataissenttothedestinationdevicethroughadatalinebitbybit;thedatalinesoftheparallelbususuallyexceedtwo.CommonserialbusesincludeSPI,I2C,USBandRS232.

Accordingtowhethertheclocksignalisindependent,itcanbedividedintoasynchronousbusandanasynchronousbus.Theclocksignalofthesynchronousbusisindependentofthedata,whiletheclocksignaloftheasynchronousbusisextractedfromthedata.SPIandI2Caresynchronousserialbuses,andRS232usesasynchronousserialbuses.

Sisäinen väylä

Samanaikaisuus

• CAMAC,käytetään instrumenttien tunnistusjärjestelmässä

• IndustryStandardArchitectureBus (ISA)

• ExtendedISA (EISA)

• LowPinCount (LPC)

• MicroChannel (MCA)

• MBus

• Multibus,Käytetyt teollisuustuotantojärjestelmät

• NuBus taiIEEE1196

• OPTilocalbus,käytettiin useinIntel80486-emolevyissä

• PeripheralComponentInterconnectBus (PCI)

• S-100bus(S-100bus),tai IEEE696,käytetään kaikissa tai samankaltaisissa mikroprosessoreissa

• SBusorIEEE1496

• VESAlocalbus (VLB, VL-väylä)

• VERSAmoduleEurocardbus (VMEbus)

• STDbus (STDbus), käytetään kahdeksankymmenen kuuden bitin mikroprosessorijärjestelmään

• Unibus

• Q-bussi

• PC/104

• PC/104Plus

• PC/104Express

• PCI-104

• PCIe-104

Sarja

• 1-johto

• HyperTransport

• I²C

• SarjaPCI (PCIe)

• Sarjaperipheral Interfacebus (SPIbus)

• FireWirei.Link (IEEE1394)

Ulkoinen väylä

Ulkoinen väyläreferstothecableandconnectorsystemusedtotransmitdataandcontrolspecifiedbyI/OpathtechnologySignal,inadditiontoabusterminationresistororcircuit,thisterminationresistorisusedToreducethesignalreflectioninterferenceonthecable.

Samanaikaisuus

• ATA: Levy-/nauhaoheislaiteväylä, joka tunnetaan myös nimellä PATA, IDE, EIDE, ATAPI jne. (Alkuperäinen ATA on rinnakkainen, mutta katso myös muita viimeisimpiä ATAPI-sarjoja)

• HIPPI (HIgh PerformanceParallelInterface): Nopea rinnakkaisliitäntä.

• IEEE-488: Tunnetaan myös nimellä GPIB (General-PurposeInstrumentationBus) tai HPIB (Hewlett-PackardInstrumentationBus).

• PCcard:Formerlyknownasthewell-knownPCMCIA,itisoftenusedinnotebookcomputersandotherportabledevices,butsincetheintroductionofUSBandembeddednetworks,thisThebusisslowlynolongerused.

• SCSI (SmallComputerSystemInterface): pieni tietokonejärjestelmän käyttöliittymä, levy-/nauhaoheisliitäntäväylä.

Sarja

• USBUniversalSarjaBus,alargenumberofexternaldevicesusethisbus

• SarjaAttachedSCSIjamuut sarja-SCSIväylät

• SarjaATA

• ControllerAreaNetwork ("CANbus")

• YVA-485

• FireWire

• Thunderbolt

Tietokoneväylä

Tietokoneväyläisasetofinformationtransmissionlinesthatcanbesharedbymultiplecomponentsintime,usedtoconnectmultiplecomponentsandprovideinformationforthemExchangepath.Thebusisnotonlyasetofsignallines,inabroadsense,thebusisasetoftransmissionlinesandrelatedbusprotocols.

a.Mainboardbus

Incomputerscienceandtechnology,peopleoftendescribethebusfrequencyinMHz.Therearemanytypesofcomputerbuses.TheEnglishnameofthefrontsidebusisFrontSideBus,whichisusuallyrepresentedbyFSB,whichisthebusthatconnectstheCPUtotheNorthBridgechip.Thecomputer'sfront-sidebusfrequencyisjointlydeterminedbytheCPUandtheNorthbridgechip.

b.Kiintolevyväylä

GenerallythereareSCSI,ATA,SATAandsoon.SATAistheabbreviationofSarjaATA.WhyuseSarjaATAistostartwithPATA-theshortcomingsofParallelATA.WeknowthatthedatalinesofATAorordinaryIDEharddiskswereoriginally40cables.These40cableshavedatalines,clocklines,controllines,andgroundlines.Amongthem,32datalinesaretransmittedinparallel(oneclockcycle).Cantransmit4bytesofdataatthesametime),sotherequirementsforsynchronizationareveryhigh.Thisiswhy80harddiskdatacablesmustbeusedstartingfromthePATA-66(thatis,DMA66)interface.Infact,theadded40cablesareallgroundcablesforshielding,andtheyareonlygroundedononesideofthemotherboard(donotconnectOnthecontrary,iftheshieldingeffectisreversed,theshieldingeffectwillbegreatlyreduced),andthetransmissionspeedoftheshieldedharddiskcanreach66MB/s,100MB/sandthehighest133MB/s.However,afterPATA-133,theparalleltransmissionspeedhasreacheditslimit,andthethreemajorshortcomingsofPATAarefullyexposed:thelengthofthesignallinecannotbeextended,thesignalsynchronizationisdifficulttomaintain,andthe5Vsignallineconsumesalotofpower.ThenwhythedatacableoftheSCSI-320interfacecanreachthehighspeedof320MB/s,andthecablecanbeverylong?HaveyounoticedthatSCSIhigh-speeddatalinesare"flowerlines"?Thisisnottolookgood,the"flower"partisactuallyasetofdifferentialsignallinestwistedinpairs.Thiscostisnotsomethingordinarycomputersystemsarewillingtobear.

c. Muut linja-autot

Muita tietokoneen väyliä ovat: Universal SarjaBus (Universal SarjaBus), IEEE1394, PCI jne..

Tekniset indikaattorit

1.Thebandwidthofthebus(busdatatransferrate)

ThebandwidthofthebusreferstotheunittimeTheamountofdatatransmittedonthebus,thatis,themaximumsteady-statedatatransmissionrateofMBtransmittedpersecond.Twofactorscloselyrelatedtothebusarethebitwidthofthebusandtheworkingfrequencyofthebus.Therelationshipbetweenthem:

Väylän kaistanleveys=väylän toimintataajuus*väylän bittileveys/8

Orbusbandwidth=(väylän bittileveys/8)/väyläsykli

2,busbitwidth

busbitWidthreferstothenumberofbitsofbinarydatathatthebuscantransmitatthesametime,orthenumberofbitsofadatabus,thatis,theconceptofbuswidthssuchas32bitsand64bits.Thewiderthebitwidthofthebus,thegreaterthedatatransferratepersecond,andthewiderthebandwidthofthebus.

3.Väylän toimintataajuus

TheworkingclockfrequencyofthebusisinMHZ.Thehighertheworkingfrequency,thefasterthebusworkingspeedandthebusbandwidth.Wider.

Kohtuullinen sijoittelu

Themotherboardnorthbridgechipisresponsibleforcontactingthememory,graphicscardandothercomponentswiththelargestdatathroughput,andconnectswiththesouthbridgechip.TheCPUisconnectedtothenorthbridgechipthroughthefrontsidebus(FSB),andthenexchangesdatawiththememoryandthegraphicscardthroughthenorthbridgechip.Thefront-sidebusisthemostimportantchannelfortheCPUtoexchangedatawiththeoutsideworld.Therefore,thedatatransmissioncapabilityofthefront-sidebushasagreateffectontheoverallperformanceofthecomputer.Themaximumbandwidthofdatatransmissiondependsonthewidthandtransmissionfrequencyofallsimultaneouslytransmitteddata,thatis,databandwidth=(busfrequency×databitwidth)÷8.Thefront-sidebusfrequenciesthatcanbeachievedonthePCare266MHz,333MHz,400MHz,533MHz,800MHz.Thelargerthefront-sidebusfrequency,thegreaterthedatatransmissioncapacitybetweentheCPUandtheNorthbridgechip,andthemoretheCPUcanbefullyutilized.Function.CPUtechnologyhasdevelopedrapidly,andcomputingspeedhasincreasedrapidly,andalargefront-sidebuscanguaranteeenoughdatatobesuppliedtotheCPU,andalowerfront-sidebuswillnotbeabletosupplyenoughdatatotheCPU,whichlimitstheperformanceoftheCPU.,Becomeasystembottleneck.

Linja-autotoiminta

Oneoperationprocessofthebusistocompletethetransferofinformationbetweentwomodules.Themastermodulestartstheoperationprocess,andtheotheristheslavemodule.Onlyonemainmoduleonthebuscanoccupythebusatacertaintime.

Bussin käyttövaiheet:

Themainmoduleappliesforbuscontrol,andthebuscontrollermakesaruling.

Bussin käyttövaiheet:

Themastermodulewilladdresstheslavemoduleafterobtainingthebuscontrolright,andthentheslavemodulewillconfirmthedatatransmission.

Virhe tiedonsiirron tarkistuksessa.

Bustiming-protokolla:Thetimingprotocolcanensurethatthetwosidesofthedatatransmissionaresynchronizedinoperationandthetransmissioniscorrect.Therearethreetypesoftimingprotocols:

Synchronousbustiming:Allmodulesonthebussharethesameclockpulsetocontroltheoperationprocess.Allactionsofeachmodulearegeneratedatthebeginningoftheclockcycle,andmostactionsarecompletedinoneclockcycle.

Asynchronousbustiming:Theoccurrenceoftheoperationisdeterminedbythespecificsignalofthesourceordestinationmodule.Theoccurrenceofaneventonthebusdependsontheoccurrenceofthepreviousevent,andthetwopartiesprovidecommunicationsignalstoeachother.

Bustiming-protokolla

Semi-synchronousbustiming:Thetimeintervalofeachoperationonthebuscanbedifferent,butitmustbeanintegermultipleoftheclockcycle.Theappearanceofthesignal,thesamplingandtheendarestillThepublicclockisthereference.TheISAbususesthistimingmethod.

Datatransmissiontype:dividedintosinglecyclemodeandburstmode.

Singlecyclemode:Onlyonedataistransmittedinonebuscycle.

Burstmode:Afterobtainingthecontrolofthemainline,multipledatatransmissionsarecarriedout.Whenaddressing,thefirstaddressofthedestinationisgiven,andthefirstdataisaccessed.Theaddressesofdata2,3todatanareautomaticallyaddressedbasedonthefirstaddressaccordingtocertainrules(suchasautomaticallyadding1).

Väylästandardi

Miksi kehittää väylästandardia?

Itisconvenientfortheexpansionofmachinesandtheadditionofnewequipment.Thereisabusstandard,Differentmanufacturerscanproducechips,modulesandcompletemachineswithdifferentfunctionsaccordingtothesamestandardsandspecifications.Userscanchoosemodulesanddevicesproducedbydifferentmanufacturersandbasedonthesamebusstandardaccordingtotheirfunctionalrequirements.Theycanevenfollowthestandards.Designspecialmodulesandequipmentwithspecialfunctionsbyyourselftoformtheapplicationsystemyouneed.Inthisway,productsatthechiplevel,modulelevel,anddevicelevelarecompatibleandinterchangeable,sothatthemaintainabilityandexpandabilityoftheentirecomputersystemcanbefullyguaranteed.

Väylästandardin tekniset tiedot?

Mechanicalstructurespecification:modulesize,busplug,busconnectorandinstallationsizehaveunifiedregulations.

Functionspecification:Eachsignalline(nameofthepin),functionandworkingprocessofeachbusmusthaveunifiedregulations.

Sähköiset tiedot:tehotaso, dynaaminen muunnosaika, kuormituskapasiteetti jne.väylän jokaisen signaalin.

Mikä yritysstandardi?

Theprocessor-mainmemorybusonthemotherboardisoftenaspecificdedicatedbus,whiletheI/ObusandtakatasoväyläusedtoconnectvariousI/OmodulesareusuallyavailableinInteroperableindifferentcomputers.Infact,thetakatasoväyläandI/Obusareusuallystandardbusesandcanbeusedbymanydifferentcomputersmanufacturedbydifferentcompanies.

BusStandard-ISA

ISA(IndustrialStandardArchitecture)busisasystembusstandardestablishedbyIBMin1984fortheintroductionofPC/ATmachines.SoitisalsocalledATbus.

Pääpiirteet:

(1) Tuki64KI/Oaddressspace, 16Mmainmemoryaddressspace,tuki 15-tason hardinterrupt,7-tason DMA-kanava.

(2)isasimplemulti-masterbus.InadditiontotheCPU,DMAcontrollers,DRAMrefreshcontrollers,andintelligentinterfacecontrolcardswithprocessorscanallbecomebusmasterdevices.

(3) Tukee 8 väylätapahtumien tyyppiä: muistilukeminen, muistikirjoitus, I/Oread, I/Kirjoita, keskeytysvaste, DAresponse, muistin päivitys, väylän välitys.

Itsclockfrequencyis8MHz,andthereare98signallinesintotal.Thedatalineisseparatedfromtheaddressline.Thewidthofthedatalineis16bits,whichcantransmit8-bitor16-bitdata,sothemaximumdatatransferrateis16MB/s.

BusStandard-EISA

EISA(ExtendedIndustrialStanderdArchitecture)busisanopenbusstandardexpandedonthebasisofISAbus.Supportmulti-busmastercontrolandbursttransmissionmode.

Theclockfrequencyis8.33MHz.Thereare198signallinesintotal,and100lineshavebeenexpandedonthebasisof98linesoftheoriginalISAbus,whichisfullycompatiblewiththeoriginalISAbus.Ithasseparatedatalinesandaddresslines.Thedatalinewidthis32bits,with8-bit,16-bit,and32-bitdatatransmissioncapabilities,sothemaximumdatatransmissionrateis33MB/s.Thewidthoftheaddresslineis32bits,sotheaddressingcapabilityisupto232.Thatis:thesemasterdevicessuchasCPUorDMAcontrollercanaccessthe4Grangeofthemainmemoryaddressspace.

Väylästandardi-PCI

PCI (PeripheralComponentInterconnect) -väylä

isahigh-performance32-bitlocalbus.ItwasproposedbyIntelattheendof1991,andlaterjoinedwithmorethan100majorPCmanufacturerssuchasIBMandDECtoestablishthePCIGroupin1992,calledPCISIG,tocoordinateandpromotethePCIstandard.

Nopeille oheislaitteille käytetty I/O-liitäntä on kytketty isäntään.Käyttäen omaa 33 MHz:n väylätaajuutta, datalinjanleveys on 32 bittiä, joka voidaan laajentaa 64 bittiin, joten tiedonsiirtonopeus voi olla 132 Mt/s～ 264 Mt/s.

Fastspeed,supportunlimitedbursttransmissionmode,supportconcurrentwork(PCIbridgeprovidesdatabuffer,andmakesthebusindependentoftheCPU),andcanbeconnectedtoothersystembuses(suchas:ISA,EISAorMCA)isconnected,thehigh-speeddevicesinthesystemareconnectedtothePCIbus,whilethelow-speeddevicesarestillsupportedbythelow-speedI/ObusessuchasISAandEISA.Itsupportsmicroprocessor-basedconfigurationandcanbeusedinsingle-processorsystemsaswellasmulti-processorsystems.

Hyödyt ja haitat

Väylärakenteen yhdistämisen tärkeimmät edut

1.Thememory-orienteddualbusstructurehashigherinformationtransmissionefficiency,Thisisitsmainadvantage.ButwhenboththeCPUandtheI/Ointerfacehavetoaccessthememory,conflictsstilloccur.

2.TheCPUisconnectedtothehigh-speedlocalmemoryandlocalI/Ointerfacethroughahigh-speedlocalbus,andtheslowerglobalmemoryandglobalI/Ointerfaceareconnectedtotheslowerglobalbus.Thus,bothhigh-speedequipmentandslow-speedequipmentaretakenintoconsideration,sothattheydonotinvolveeachother.

3.Simplifiesthehardwaredesign.Itisconvenienttoadoptthemodularstructuredesignmethod.Thebus-orientedmicrocomputerdesignonlyneedstomakecpuplug-in,memoryplug-inandI/Oplug-inaccordingtotheseregulations,andconnectthemtothebustoworkwithoutconsideringthedetailedoperationofthebus.

4.Simplifiedthesystemstructure.Thestructureofthewholesystemisclear.Therearefewconnections,andthebackplaneconnectionscanbeprinted.

5.Thesystemhasgoodscalability.Thefirstisscaleexpansion,whichonlyrequiresmoreplug-insofthesametype.Thesecondisfunctionexpansion.Thefunctionexpansiononlyneedstodesignnewplug-insinaccordancewiththebusstandard,andthereisoftennostrictrestrictiononthepositionwheretheplug-insareinsertedintothemachine.

6.Thesystemupdateperformanceisgood.Becausethecpu,memory,I/Ointerface,etc.areallconnectedtothebusaccordingtothebusprotocol,aslongasthebusisproperlydesigned,newplug-inscanbedesignedatanytimealongwiththeprogressoftheprocessorchipandotherrelatedchips.Thesystemisupdatedonthebottomboard,otherplug-insandbackplaneconnectionsgenerallydonotneedtobechanged.

7.Itisconvenientforfaultdiagnosisandmaintenance.Themainboardtestcardcaneasilyfindthefaultypartandthebustype.

Väylärakenteen haitat

BecausethebusissetupbetweentheCPUandthemainmemory,andbetweentheCPUandtheI/Odevice,itimprovesThespeedandefficiencyofinformationtransmissioninthemicrocomputersystemareimproved.However,becausethereisnodirectpathbetweentheexternaldeviceandthemainmemory,theinformationexchangebetweenthemmustbetransferredthroughtheCPU,whichreducestheworkefficiencyoftheCPU(orincreasestheoccupancyrateoftheCPU.Generallyspeaking,theperipheralworkThelessCPUinterventionisrequired,thebetter.ThelessCPUintervention,thelowertheCPUoccupancyrateofthisdevice,indicatingthehigherthedegreeofintelligenceofthedevice.ThisisthemaindisadvantageoftheCPU-orienteddual-busstructure.Italsoincludes:

1.Theuseofbustransmissionistime-sharing.Whenmultiplemastersapplyfortheuseofthebusatthesametime,arbitrationofthebusmustbecarriedout.

2.Thebandwidthofthebusislimited.Ifahardwaredeviceconnectedtothebusdoesnothavearesourcecontrolmechanism,itwilleasilycauseinformationdelay(thisisfatalinsomeplaceswithstrongimmediacy).

3.Thedeviceconnectedtothebusmusthaveaninformationscreeningmechanism,anditisnecessarytojudgewhethertheinformationispassedtoitself.

Liittyviä tietoja

Anymicroprocessormustbeconnectedtoacertainnumberofcomponentsandperipheraldevices,butifyouuseasetoflinesforeachcomponentandeachperipheraldeviceConnectdirectlywiththeCPU,thentheconnectionwillbeintricateandevendifficulttoimplement.Inordertosimplifythehardwarecircuitdesignandsimplifythesystemstructure,agroupoflinesiscommonlyused,andanappropriateinterfacecircuitisconfiguredtoconnectwithvariouscomponentsandperipheraldevices.Thisgroupofsharedconnectionlinesiscalledabus.Theuseofabusstructurefacilitatestheexpansionofcomponentsandequipment,especiallythedevelopmentofaunifiedbusstandardmakesiteasytointerconnectdifferentequipment.

Thebusinamicrocomputergenerallyincludesaninternalbus,asystembusandanexternalbus.Theinternalbusisthebusbetweentheperipheralchipsinthemicrocomputerandtheprocessor,whichisusedfortheinterconnectionatthechiplevel;whilethesystembusisthebusbetweentheplug-inboardsandthesystemboardinthemicrocomputer,andisusedforthemutualexchangeattheplug-inboardlevel.Theexternalbusisabusbetweenamicrocomputerandanexternaldevice.Asadevice,amicrocomputerexchangesinformationanddatawithotherdevicesthroughthebus.Itisusedfordevice-levelinterconnection.Inaddition,inabroadsense,computercommunicationmethodscanbedividedintoparallelcommunicationandserialcommunication,andthecorrespondingcommunicationbusesarecalledparallelbusesandserialbuses.Parallelcommunicationisfastandhasgoodreal-timeperformance,butitisnotsuitableforminiaturizedproductsduetothelargenumberofportsoccupied.Althoughtheserialcommunicationrateislow,itismoresimpleandconvenientinthemicro-processingcircuitwherethedatacommunicationthroughputisnotverylarge.Convenientandflexible.Sarjacommunicationcangenerallybedividedintoasynchronousmodeandsynchronousmode.---Withthedevelopmentofmicroelectronicstechnologyandcomputertechnology,bustechnologyisalsoconstantlydevelopingandimproving,sothatthecomputerbustechnologyhasawidevarietyandeachhasitsowncharacteristics.

Bussien kehityksen historia

ISAbus

(Toimialan standardiarkkitehtuuri)

TheearliestPCbusItisthesystembusadoptedbyIBMinPC/XTcomputersin1981.Itisbasedonthe8-bit8088processorandiscalledPCbusorPC/XTbus.

In1984,IBMintroducedthePC/ATcomputerbasedonthe16-bitIntel80286processor,andthesystembuswasalsoexpandedto16bit,andwascalledthePC/ATbus.InordertodevelopperipheraldevicescompatiblewiththeIBMPC,theindustrygraduallyestablishedtheISA(Toimialan standardiarkkitehtuuri)busbasedontheIBMPCbusspecification.

PCIbus

(PeripheralComponentInterconnect)

DuetotheslowspeedoftheISA/EISAbus,thespeedoftheCPUonceappearedHigherthanthebusspeed,theharddisk,displaycardandotherperipheraldevicescanonlysendandreceivedatathroughaslowandnarrowbottleneck,whichseriouslyaffectstheperformanceofthewholemachine.Tosolvethisproblem,whenIntelreleasedthe486processorin1992,italsoproposeda32-bitPCI(peripheralcomponentinterconnect)bus.

AGPbus

(AcceleratedGraphicsPort)

ThePCIbusisasystembusindependentoftheCPU,whichcanconnectthedisplaycard,High-speedperipheralssuchassoundcards,networkcards,andharddiskcontrollersaredirectlyhungontheCPUbus,breakingthebottleneckandmakingtheCPUperformancefullyutilized.Unfortunately,becausethePCIbushasabandwidthofonly133MB/s,itmaybemorethanenoughtodealwithmostinput/outputdevicessuchassoundcards,networkcards,andvideocards,butfor3Dgraphicscardsthathaveagrowingappetite,theyareincapableandbecomeaconstraint.Displaythebottleneckofthesubsystemandtheperformanceofthewholemachine.Therefore,thecomplementofthePCIbus-theAGPbuscameintobeing.

PCI-Express

After10yearsofrepairsandrepairs,thePCIbushasbeenunabletomeettherequirementsofcomputerperformanceenhancement.Itmustbelargerandmoreadaptable.ThenewgenerationbuswithdeeperdevelopmentpotentialisreplacedbythePCI-Expressbus.

ComparedwiththePCIbus,thePCI-Expressbuscanprovideextremelyhighbandwidthtomeettheneedsofthesystem.ThebandwidthofthePCIExpressbus2.0standardisshowninthefollowingtable:

Afterthreeandahalfgenerations(AGPbusisjustanenhancedPCIbus),theexternalbusofPCfinallydevelopedtoPCI-E4.0,Providesamuchlargerbandwidththanthepreviousbus.Asforthefuturedirectionofbusdevelopment,Ibelieveitwillappearsoonaspeople'sdemandforbandwidthcontinuestoincrease.

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